Experience

Software Engineering Intern·Singapore

Research Intern, Trusted Systems Group·Saarbrücken, Germany

• Audited 131 open-source RISC-V cores by hand against their stated security claims, reading RTL, testbenches and commit history for each one.
• Designed the study's taxonomy of 13 dimensions and 50 attributes, covering reproducibility, verification and CI/CD resilience.
• Built the reproducible Python analysis pipeline, including the inter-rater reliability module, which produces 50+ figures and two composite hardware-security indices.
• Found that 95% of the cores have no side-channel defenses and 77% have no secure boot. The findings are part of a paper the group is preparing.

A tick-to-trade pipeline in FPGA fabric. Ethernet, IPv4, UDP and market-data frames are parsed as the bytes arrive, and a trade decision leaves the chip with no CPU, cache or interrupt in the critical path.

• Every frame gets its verdict exactly 5 clock cycles after the last payload byte. The fixed latency is proven for all inputs by k-induction.
• Proved with SymbiYosys that a trade cannot fire unless every validation check has passed on a complete frame, and that a risk cap on order quantity always holds.
• Emits 16-byte decision records with an echoed sequence number on AXI-Stream, so the host can measure end-to-end latency.

• SystemVerilog
• SymbiYosys
• cocotb
• AXI-Stream

A streaming Ethernet, IPv4 and UDP header parser with a fixed-latency Level-1 trigger that makes one accept or reject decision per frame without ever stalling the wire.

• Closes timing at 250 MHz on an Artix-7 (Fmax about 281 MHz) in 109 LUTs and 149 flip-flops, under 0.2% of the device.
• Raised Fmax from 159 to 281 MHz by pipelining the checksum fold out of the trigger's critical path.
• Formally proved the constant verdict latency, and tested the design with malformed and edge-case packets from a cocotb and scapy bench.

• SystemVerilog
• Vivado
• SymbiYosys
• cocotb

A market-data feed handler and limit order book for NASDAQ ITCH 5.0.

• Decodes all 23 ITCH 5.0 message types over UDP multicast with MoldUDP64 framing.
• Keeps bid and ask sides in separate price-level trees with FIFO queues, and an O(1) hash map for cancels and modifies.

• C++20
• Linux

An implementation of the Solovay–Kitaev algorithm that approximates any SU(2) unitary by a sequence from a discrete gate set, to precision ε in O(log^2.71(1/ε)) gates.

• Uses a precomputed base-case table and a vectorised nearest-neighbour search for the recursion.

• Python
• NumPy

A physics-informed Kolmogorov–Arnold network that estimates lithium-ion battery state of health from a single discharge cycle.

• Constrains predictions with a Verhulst degradation ODE through an augmented Lagrangian, with learnable physical parameters and per-sample multipliers.
• Runs end to end on the MIT and Stanford fast-charging dataset.

• PyTorch
• pykan

Tic-tac-toe where every square is a simulated qubit. Every move is appended to a real Qiskit circuit, and every measurement is a simulated collapse of the board state.

• Python
• Qiskit
• Aer

Quant Club, IIT Delhi

Entrepreneurship Development Cell, IIT Delhi

ARIES, the AI society of IIT Delhi

• Managed the society's research projects in machine learning.
• Managed the society's events.

Board for Student Welfare, IIT Delhi

• Mentors first-year students through single and multivariable calculus.

Department of Electrical Engineering, IIT Delhi